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Toward Fault-Tolerant Variational Optimization: QAOA under [[4,2,2]] Error Detection

Overview Research area: Quantum computing — variational quantum algorithms (QAOA), quantum error detection, and quantum–HPC hybrid workflows. Technical level: Intermediate. The paper assumes familiari

Toward Fault-Tolerant Variational Optimization: QAOA under [[4,2,2]] Error Detection
arXiv
2609.07537
Published
2026-09-07
Authors
Matteo Robert Child, Emanuele Dri, Giacomo Vitali, Chiara Vercellino, Alberto Leporati

AI summary

Overview

Research area: Quantum computing — variational quantum algorithms (QAOA), quantum error detection, and quantum–HPC hybrid workflows.

Technical level: Intermediate. The paper assumes familiarity with QAOA and stabilizer codes but explains its constructions concretely.

Scope: A simulation study of a partially fault-tolerant, [[4,2,2]]-encoded QAOA for a four-vertex square Max-Cut instance, introducing an ancilla-mediated logical R_ZZ gate that acts between separate code blocks and benchmarking it against an unencoded baseline under five noise models and two connectivity topologies.

What This Paper Is About

Near-term quantum devices are noisy, and variational algorithms such as QAOA are especially exposed to that noise because they return bitstrings whose quality degrades with every gate. Error detection codes offer a cheaper alternative to full error correction: instead of fixing errors, they flag bad runs so they can be discarded in post-processing.

The paper asks whether wrapping a QAOA circuit in the small [[4,2,2]] error-detection code actually improves the chance of sampling the correct Max-Cut answer, and it supplies the missing circuit ingredient — a logical R_ZZ gate that works when the two qubits of a cost-layer edge live in different code blocks.

Key Contributions

  1. Inter-block logical R_ZZ gate. The authors construct an ancilla-mediated logical R_ZZ operation between qubits in two distinct [[4,2,2]] blocks (same-position up-up/down-down case), supplemented by two logical SWAP gates for the different-position (up-down/down-up) case. Prior work only covered rotations inside a single block. Because the construction combines the intra-block logical R_ZZ with transversal fault-tolerant gates, it remains partially fault-tolerant.

  2. A complete R_ZZ primitive set. Together with the existing intra-block gate, the same-position and different-position inter-block variants cover every possible arrangement of the two qubits in a cost-layer edge, so any Max-Cut instance can be encoded across multiple [[4,2,2]] blocks without defining new physical implementations.

  3. A four-variant benchmarking campaign. Unencoded, encoded, unencoded routed, and encoded routed circuits (routing onto Google's Sycamore topology via Cirq's RouteCQC) are compared under five noise models — single-qubit depolarizing, two-qubit depolarizing, amplitude damping, readout error, and reset error — with all-to-all and grid connectivity.

  4. Stabilizer-measurement budget study. The number of syndrome measurements (1, 3, or 5) is varied, and five measurements — before every R_X layer, before every R_ZZ layer, and a final decoding measurement — is identified as giving the strongest benefit.

Main Findings

  • Post-selection helps consistently. Across the noise models tested, post-selecting on stabilizer measurements raises the ground-state probability of the surviving samples for the encoded circuit relative to the unencoded baseline.

  • Five measurements is best. In the two-qubit depolarizing comparison at p = 0.01, the encoded circuit with 5 stabilizer measurements achieves the greatest improvement in ground-state probability; the variants with 1 and 3 measurements are intermediate.

  • Cost of encoding is substantial. The encoded all-to-all circuit uses 130 single-qubit gates, 172 two-qubit gates, and depth 137, versus 24, 16, and 28 for the unencoded all-to-all baseline. Routing pushes the encoded circuit to 448 two-qubit gates and depth 227 (unencoded routed: 34 and 36). The paper notes circuit depth is roughly 5× that of the unencoded circuit.

  • Single-qubit depolarizing noise. Curves for the all-to-all and routed unencoded circuits overlap, since routing only adds two-qubit gates, which this noise model does not affect. The encoded circuit achieves a markedly higher post-selected ground-state probability.

  • Two-qubit depolarizing noise. Routing onto the grid substantially reduces the post-selection rate because extra SWAP gates add error opportunities. The encoded routed circuit still beats its unencoded counterpart up to p = 0.03, and the all-to-all encoded circuit up to p = 0.04. Error bars for both encoded circuits grow notably with noise probability, reflecting fewer post-selected samples.

  • Amplitude damping. Encoded circuits outperform unencoded ones at least up to p = 0.03.

  • Readout error. Post-selection rate and ground-state probability curves for routed and all-to-all variants of each circuit coincide precisely, since the embedding does not affect measurement operations; a small divergence appears at higher noise levels due to statistical uncertainty.

  • Reset error. Ground-state probability of post-selected samples is exactly 1 for all circuits, regardless of encoding or topology. If an ancilla is wrongly initialised to |1⟩ instead of |0⟩ and nothing else goes wrong, it is also measured as |1⟩ and discarded by the filter.

  • Simulation hardware observation. For the all-to-all encoded circuit under a minimal noise model (two-qubit depolarizing only, p = 0.01), a single CPU thread was approximately 3× faster than the GPU, attributed to memory-transfer overhead exceeding the GPU speedup at this circuit size. Hardware used: AMD EPYC 9354 at 3250 MHz CPU and NVIDIA L40S GPU with cuQuantum/CUDA (gpu_mode=0).

  • Statistics. The noise sweeps comprised 10 experiments of 50,000 repetitions each across 24 noise configurations, for 240 total experiments, each on a dedicated CPU thread; the measurement-count study used 10 runs of 5,000 repetitions each.

Methodology in Plain English

The team picked the smallest interesting test case: Max-Cut on a square (a four-vertex cycle), whose optimal cut is the pair of non-adjacent vertices. They built a two-layer (p = 2) QAOA circuit and optimised its two angle parameters classically with COBYLA.

They then built four versions of the circuit. One was a plain, unencoded baseline. A second encoded the two logical qubits into four physical qubits using the [[4,2,2]] code, spreading the four vertices across two code blocks. The remaining two were the same circuits routed onto Google's Sycamore chip topology, which forces extra SWAP gates.

Because the code's native gates do not include the R_X and R_ZZ rotations QAOA needs, the authors used ancilla-assisted (quasi fault-tolerant) implementations rather than magic-state distillation, which they avoided due to its high resource requirements. The new part is the R_ZZ gate that connects qubits in different blocks, built from the known intra-block procedure plus SWAP gates that act as logical CNOTs. Ancillas are reused: two for stabilizer measurements and one shared between the R_X and R_ZZ rotations, which are applied sequentially so the ancilla can be reset in between.

Finally, they simulated everything with Cirq and the qsimcirq backend, injecting five kinds of noise at a tunable strength p, and measured two quantities: what fraction of runs survive post-selection, and how often the surviving samples are the correct Max-Cut bitstrings.

Why This Matters

Impact on research. The paper closes a concrete gap in the literature: previous partially fault-tolerant constructions for the [[4,2,2]] code only handled gates within one block, which is insufficient for any problem whose interaction graph spans more blocks. By completing the R_ZZ primitive set, the work makes multi-block encoded QAOA circuit construction possible in principle for arbitrary Max-Cut instances, and it provides the first simulation-level evidence (within this paper's scope) that detection-based post-selection pays off for QAOA across a range of realistic noise channels.

Real-world applications:

  • Combinatorial optimisation — logistics, scheduling, and network partitioning problems formulated as Max-Cut or Ising models.
  • Quantum–HPC hybrid pipelines — offline angle pre-computation on classical clusters with the quantum device used mainly for sampling.
  • Early fault-tolerant hardware roadmaps — a lower-resource alternative to magic-state distillation for near-term devices.
  • Benchmarking and compiler tooling — the gate-count and depth trade-offs for encoded versus routed circuits inform transpilation and topology-aware design.

Industry relevance. The work speaks directly to groups building superconducting hardware and cloud quantum services, since it quantifies the cost (roughly 5× depth, an order of magnitude more gates) of adding a detection layer and identifies where that cost is recovered. The CPU-versus-GPU observation is also practically useful for teams sizing simulation infrastructure.

Future Directions

  • Quantify syndrome decoding cost. The classical overhead of decoding is not included in the resource accounting and should be measured for full cost estimates at scale.
  • Reduce depth. Circuit depth, roughly 5× the unencoded version, could be lowered by using additional ancilla qubits to parallelise stabilizer rounds and logical rotations.
  • Scale beyond a single C_4 instance. The evaluation covers one four-vertex instance spanning two blocks; whether post-selection remains advantageous at larger sizes is untested, especially since the post-selection rate compounds multiplicatively with circuit depth and the number of stabilizer rounds.
  • Move from detection to correction. Full error correction would eliminate the sampling overhead entirely at the cost of a substantially larger qubit count — described as the natural next step toward production-grade fault-tolerant quantum–HPC workflows.
  • Systematic simulator study. A broader sweep over circuit widths, depths, and batch sizes is left open, given that CPU multithreading outperformed the GPU backend at this circuit size.

Target Audience

Quantum computing researchers and graduate students working on variational algorithms, error mitigation and detection, and NISQ-era circuit design; compiler and hardware engineers interested in the gate-count and depth costs of encoding; and HPC specialists building hybrid classical–quantum simulation and training pipelines. Readers without a background in stabilizer codes will still follow the motivation and results, but the gate construction in Section 3 requires familiarity with syndrome measurement and transversal gates.

Authors’ abstract

We present a partially fault-tolerant implementation of QAOA based on the $[[4,2,2]]$ error-detection code, targeting the Max-Cut problem on a square graph. Our main contribution is a novel ancilla-mediated logical $R_{ZZ}$ gate enabling interactions between qubits in different $[[4,2,2]]$ blocks. We evaluate unencoded and encoded circuits under five noise models, with both all-to-all and grid-routed connectivity, using the Cirq and qsimcirq frameworks with parallel CPU execution. Post-selection on stabilizer measurements consistently improves the probability of sampling optimal bitstrings, with five measurements providing the strongest benefit. These results support error-detection as a practical near-term strategy for improving the quality of variational quantum algorithms.

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