Realizing Error Suppression in Partially Fault-Tolerant Quantum Simulations with IBM Quantum Computers

AI summary

Overview

Research area: Quantum computing for scientific simulation, specifically quantum error detection (QED) and partially fault-tolerant (FT) quantum simulation of lattice spin models on superconducting hardware.

Technical level: Advanced. The paper assumes familiarity with stabilizer codes, syndrome extraction, Trotterized time evolution, and tensor-network reference calculations. The high-level conclusions are accessible without that background.

Scope (one sentence): The paper demonstrates on IBM's ibm_boston superconducting processor that encoding 42 logical qubits into 21 blocks of the [[4,2,2]] Iceberg code, combined with a new selective-filtering technique called Observable-Ranked Postselection, improves the accuracy of local observables in 1+1D and 2+1D Ising-model simulations relative to unencoded circuits run on the same device.

What This Paper Is About

Fully fault-tolerant quantum computing is still too costly for practical simulations, but error-detecting codes with small footprints may offer near-term gains. The authors ask whether a "partially fault-tolerant" scheme — fault-tolerant syndrome extraction paired with non-fault-tolerant logical gates — can beat unencoded circuits on today's noisy hardware. They test this by simulating false-vacuum decay in the mixed-field Ising model in one and two spatial dimensions and comparing encoded versus unencoded results against classical tensor-network (MPS) reference values.

Key Contributions

1. A hardware-native implementation of many [[4,2,2]] code blocks. The authors embed 21 code blocks (42 logical qubits, up to 136 physical qubits) on the heavy-hex connectivity of ibm_boston, using shallow syndrome-extraction circuits designed for that native topology and a block placement selected for the most square-grid-like logical connectivity graph (with four missing internal edges).

2. A partially fault-tolerant circuit architecture. Fault-tolerant syndrome extraction (verified as level-1-FT by classical simulation) is combined with non-fault-tolerant logical rotations, avoiding the magic-state-injection or code-switching overhead a fully fault-tolerant gate set would require, while still targeting a logical error rate of the form $p_L(p) = Ap + Bp^2$ with $A \ll B \ll 1$.

3. Observable-Ranked Postselection (ORP). A new selective-filtering technique that ranks detection events by their measured correlation with a logical observable, $\Delta_j = |\langle \bar{O}\rangle_{v_j=0} - \langle \bar{O}\rangle_{v_j=1}|$, and postselects only on the top-$k$ ranked detectors. This recovers much of the benefit of full syndrome postselection without its exponential shot loss, with the cut level $k^*$ chosen at the lower edge of the most stable plateau.

4. A quantitative encoded-versus-unencoded comparison across 1D and 2D, without error mitigation. Encoded results are benchmarked against unencoded runs and MPS calculations using median absolute error, cumulative distribution functions, and a signal-survival factor $\alpha$ from a through-origin fit, isolating improvements attributable to error detection alone.

Main Findings

• Encoded circuits win in both dimensions. Encoded simulations outperform unencoded counterparts in estimating local observables by 2–6% at intermediate times in 1+1D, growing with circuit depth to over 200% in 2+1D at the latest times studied.

• Largest median-error improvements. The biggest reduction in median absolute error was 36.1% ± 3.3% up to $t=4$ for $g_z = 0.5$ with $R=1$ in 1D, and 56.9% ± 0.8% for $g_z = 0.5$ with $R=1$ in 2D.

• 2D improvement grows roughly linearly with time. The percent improvement in $\alpha$ rises with an average slope of 23.5 ± 0.8% in the melting regime ($g_z=0.5$) and 22.8 ± 0.5% in the localized regime ($g_z=1.5$). The authors attribute this to the lightcone argument: a caught error prevents corruption over a volume scaling as $\mathcal{O}(t^2)$ in 2D versus $\mathcal{O}(t)$ in 1D.

• 1D improvement is roughly flat, with a melting-regime caveat. For $g_z = 0.5$ an improvement is seen up to $t = 4.5$ (average 5.99 ± 0.99%), and for $g_z = 1.5$ the average improvement is 2.5 ± 0.23% over all $t$. Beyond $t \sim 4.5$ the 1D melting regime shows a disadvantage from encoding because fast dynamics proliferate errors.

• Encoding is more effective when dynamics are slow. The localized regime ($g_z = 1.5$) gives a more consistent improvement than the melting regime ($g_z = 0.5$), attributed to a narrower backwards lightcone that restricts error propagation to a smaller region.

• More syndrome rounds help early, hurt late. Early-time results show a modest advantage from larger $R$, but beyond $t \sim 4$ this reverses and fewer extraction rounds perform better, because ancilla qubits are not actively reset and retained coherent contamination propagates. Adding resets did not significantly improve $\alpha$, since the coherence-time cost roughly cancels the benefit.

• Encoding removes geometric, not Trotter, overhead in 2D. The square logical connectivity allows a 2D lattice to be simulated at 1.5 times lower overall circuit depth than the direct unencoded implementation. In 1D, by contrast, encoded circuits require a two-to-six-times increase in circuit depth.

• The advantage is fragile and device-dependent. No advantage was found on devices with slightly worse error rates ($\mathcal{O}(10^{-3})$) and coherence times ($\mathcal{O}(100,\mu\text{s})$) than ibm_boston, indicating that state-of-the-art hardware sits near the pseudothreshold.

• Postselection carries much of the 2D gain. When postselection is removed, $\alpha$ drops significantly and the improvement disappears for $R = 4, 8, 16$ in 2D, showing that the 2D improvement is largely due to postselection rather than reduced gate depth.

Methodology in Plain English

The team encodes two logical qubits into every group of four physical qubits using the smallest "Iceberg" code, a distance-2 code that can detect any single-qubit error by checking two parity conditions (one in the X basis, one in the Z basis). Each block also gets two extra ancilla qubits to read out those checks, so six physical qubits per block.

Logical gates themselves are implemented in a shallow, non-fault-tolerant way, while the error-checking readout is done with a carefully designed fault-tolerant circuit that prevents errors from spreading. The blocks are laid out on the chip so that the resulting logical connections resemble a square grid, which is what makes the 2D simulation shallower than the unencoded alternative.

Because the code cannot catch every error, and because discarding every shot with a flagged check would destroy the statistics, the authors instead rank each check by how strongly its firing correlates with a wrong value of the observable being measured. They then progressively discard only the shots where the most damaging checks fired, stopping at the point where the estimate stops moving and the ensemble is still large enough to keep statistical error under control.

The target physics is false-vacuum decay: an initial bubble of true vacuum is prepared in a product state and allowed to evolve under the mixed-field Ising Hamiltonian with $J=1$ and $g_x=0.75$, at $g_z=0.5$ (bubble melting) and $g_z=1.5$ (bubble localized). Classical matrix-product-state simulations provide the ideal reference, and the device results are scored by absolute error per qubit per time and by a fitted signal-survival factor $\alpha$. Crucially, no noise-learning error mitigation is applied to either arm, so the comparison isolates the effect of encoding.

Why This Matters

Impact on research. The work gives a concrete, quantified demonstration that error-detecting codes with small footprints can improve scientific observables on present-day superconducting hardware — placing these experiments in a crossover regime between NISQ heuristics and fully fault-tolerant operation. It also introduces a reusable filtering method (ORP) and a design philosophy (match code blocks to the natural repeating units of the physical model, such as the two qubits per site in the Schwinger model) that generalizes beyond the Ising model.

Real-world applications (broader context, not claims made by the paper):

• Simulating lattice gauge theories that describe the fundamental forces of Nature, the authors' stated long-term motivation.
• Studying real-time dynamics of magnetic materials, where Ising-type models capture collective spin behavior.
• Probing non-equilibrium phenomena such as vacuum decay, string breaking, and thermalization that are hard to treat classically.
• Informing hardware and compiler roadmaps by identifying which device characteristics (gate error rate, coherence time) actually determine whether encoding pays off.

Industry relevance. The results give quantum hardware providers and compiler teams a concrete near-term benchmark: encoding advantage is not generic but tied to code choice, circuit overhead, and the hardware operating point, and even modest improvements in device fidelity can cross the pseudothreshold. The finding that a small amount of extra noise eliminates the gain is directly actionable for roadmap planning.

Future Directions

• Combine encoding with error mitigation. The authors explicitly call for pairing fault-tolerant constructions that remove leading-order errors with mitigation techniques that suppress higher-order contributions, including noise-learning methods and techniques that operate directly on syndrome information.
• Reduce or eliminate the postselection overhead. The paper notes that implementing a true quantum error-correcting code would remove the need for the filtering machinery built to manage postselection cost; how much of the observed advantage survives that substitution is an open question.
• Extend to other models and code blocks. The authors point to mappings where a lattice site maps to two qubits (as in the 1+1D Schwinger model), suggesting code blocks aligned with the symmetry units of other gauge theories.
• Understand and control ancilla-reset tradeoffs. The reversal of the $R$ dependence beyond $t \sim 4$, and the observation that resets neither clearly help nor hurt, leave open how best to schedule syndrome extraction in the crossover regime.

Target Audience

Quantum-computing researchers working on near-term error correction and error detection; nuclear and high-energy physicists pursuing quantum simulation of lattice gauge theories and spin models; quantum hardware and compiler engineers interested in how code layout maps onto heavy-hex connectivity; and graduate students or advanced undergraduates with some background in stabilizer codes who want a worked, experimentally grounded example of partial fault tolerance on real superconducting hardware.

Authors’ abstract

Quantum error-detecting codes offer a near-term path for improving the performance of quantum simulations on noisy hardware. Using IBM's superconducting quantum computer ibm_boston, we show that partially fault-tolerant encoded quantum simulations of the Ising model in 1+1D and 2+1D outperform their unencoded counterparts in estimating local observables. To represent 42 logical qubits on the heavy-hex quantum processor, 21 blocks of the [[4, 2, 2]] Iceberg code and up to 136 physical qubits are used. By pairing fault-tolerant syndrome extraction with non-fault-tolerant logical operations, this scheme preserves many of the benefits of error detection while avoiding the overhead typically required for a fully fault-tolerant logical gate set. The encoding's square logical connectivity, together with the freedom to place logical qubits within each block, enables simulations of a 2D spatial lattice with lower circuit depth than the unencoded implementation requires. We introduce Observable-Ranked Postselection, a selective-filtering technique based on syndrome correlations that recovers reliable results without the prohibitive shot loss of full syndrome postselection. Under the cumulative effect of device errors, this encoding improves local-observable accuracy over the unencoded baseline by 2-6% at intermediate times in 1+1D simulations, growing with circuit depth to over 200% in 2+1D at the latest times studied.