QQLink: A Declarative Framework for Multi-QPU Quantum Workflow Orchestration

AI summary

Overview

Research area: Quantum software systems, specifically distributed quantum computing and multi-QPU (quantum processing unit) workflow orchestration.

Technical level: Advanced. The paper assumes familiarity with quantum circuits, mid-circuit measurement, classical feedforward, and compiler/runtime concepts, though the prose is unusually readable for a systems paper.

Scope (one sentence): The paper presents QQLink, a two-layer programming and orchestration framework that lets a developer express a multi-node quantum protocol once — as workflow nodes, deferred measurement references, and declared entanglement — and have the system automatically derive cross-node coordination, plan an acyclic dependency graph, and execute it on simulators or on partitioned hardware.

What This Paper Is About

Protocols such as teleportation, superdense coding, and non-local gates are not just separate circuits compiled next to each other: a measurement made in one part of the program must control an operation somewhere else. Existing quantum SDKs (Qiskit, Cirq, PennyLane) handle circuits and some dynamic control flow on a single backend, but they do not offer a reusable orchestration layer that separates what a workflow computes from where and how it runs.

QQLink fills that gap. The goal is a backend-neutral program in which a developer declares which nodes exist, which qubits they own, which measurements feed which corrections, and which Bell pairs are needed — and the platform works out the ordering, messages, placement, and lowering to hardware without rewriting the application.

Key Contributions

1. A programming model for multi-QPU workflows. Workflow nodes, typed deferred measurement references (MeasureRef handles that can be compared and passed to if_then on any circuit), declarative entanglement links (declare_entanglement, request_bell_pair, cross_cnot), and an explicit ordering primitive (wait_for) that records a dependency without applying a gate.

2. A two-pass planning algorithm with proved guarantees. Pass 1 segments circuits and derives "footprint edges" from the qubits each instruction touches, refining segments into execution units; pass 2 adds "measurement-reference edges" from the unit that produced each labeled outcome to the unit that consumes it. The paper proves determinism, dependency completeness, and acyclicity, and reports planning cost of 8 to 17 microseconds per instruction, linear over three orders of magnitude of program size.

3. Execution mechanisms for heterogeneous targets. Virtual-QPU partitioning of a shared backend, a three-way channel-selection policy (co-located, simulated, provider-native), per-instruction conditional dispatch, retry and timeout controls, and a hardware path that lowers an entire plan into one dynamic circuit with if_test blocks.

4. Seven protocol workflows plus a task-layer control loop, and a systems evaluation. Superdense coding, register teleportation, entanglement swapping, a Grover search and a Bernstein–Vazirani algorithm built from teleported gates, a three-node Toffoli gate, a three-node repetition code, and a single-node accept/reject control loop — evaluated on forced-branch simulator tests, separate executor processes, cost-of-abstraction comparisons, and two IBM Heron processors.

Main Findings

• Exhaustive feedforward verification passes. Forced-branch tests over tomographically complete input sets on the simulator runtime path yield output-state infidelities of at most 5 × 10⁻¹² and no incorrect classical outputs.

• Plan order does not matter. Replaying every plan in random topological orders leaves each final state unchanged, consistent with the paper's argument that unconnected units commute.

• Separate executors work only with the full dependency set. With one controller process per node, delayed messages, and the joint quantum state held by a centralized simulation service, every run with the full plan is correct. Ablating the required cross-node measurement or footprint dependencies causes protocol failures.

• No circuit-level cost from the abstraction. Lowered circuits match hand-written implementations of the same construction in two-qubit gate counts and conditional-block counts, across transpiler settings and against an independent distribution compiler.

• Hardware results are same-chip only, and noisy. Runs on two IBM Heron processors, each partitioned into virtual QPUs, demonstrate execution in two sessions a week apart, but show large variation between sessions and losses beyond what calibration-derived noise models predict.

• Coherence-sensitive checks are inconclusive. These checks do not establish coherent Toffoli operation or preservation of the intended repetition-code superposition.

• The framework is explicit about its scope. The hardware demonstrations are virtual-QPU partitions of single devices, not physically networked QPUs; "distributed" describes the protocol class QQLink expresses, not the demonstrated execution substrate.

Methodology in Plain English

The authors built a two-layer system. The application layer is purely descriptive: a developer writes one program containing named circuits (one per workflow node, such as Alice and Bob), each declaring a number of qubits and a list of instructions. Nothing at this layer names a backend, a physical qubit, or a message. When a circuit measures a qubit it gets back a handle; that handle can be compared to a value and the resulting condition passed to if_then on a different circuit, which is how cross-node feedforward is written.

The platform layer consumes that description. Its planner walks the instruction streams in authoring order, splits circuits into execution units at measurement, conditional, Bell-pair, and cross-CNOT boundaries (unless a circuit qualifies for whole-circuit mode), and records for each (circuit, qubit) pair which unit last touched it — that produces the ordering edges. A second pass scans for conditionals and wait_for and wires each one to the unit that produced the referenced outcome, which also covers local references that qubit footprints alone would miss. Circuits connected by entanglement or cross-circuit references are grouped transitively and assigned to one backend with enough capacity.

At runtime the plan is walked in topological order (Kahn's algorithm with a heap that releases ready units in authoring order) and a callback is invoked per unit. To test whether the abstraction really buys anything beyond a single dynamic circuit, the authors ran one controller process per node with artificially delayed messages and no central dispatcher, then deliberately removed cross-node edges to confirm the protocols break. To test cost, they lowered plans to dynamic circuits and compared gate and conditional counts against hand-written versions. Finally they ran the workflows on real hardware by mapping each workflow node to a disjoint sector of one IBM device.

Why This Matters

Impact on research. The paper reframes multi-QPU programming as an orchestration problem rather than a circuit-construction problem, and gives a precise contract: what must be planned, what can be derived automatically, and where the abstraction boundary sits. Its negative hardware results — session-to-session variation, excess loss, and coherence checks that fail to confirm the intended behavior — are as useful as the positive ones, because they mark where current devices, not the software model, are the bottleneck. The finding that an adapter re-executing the accumulated circuit on each measurement silently destroys every feedforward protocol is a concrete correctness warning for simulator authors.

Real-world applications:

• Distributed quantum computing across modular processors or networked QPUs, where measurement outcomes on one module must condition gates on another.
• Quantum networking and entanglement-distribution testbeds, where the provider-native channel path is designed to delegate to hardware such as ion-trap shuttling or photonic links.
• Quantum–HPC integration, where a survey cited in the paper names bidirectional interaction (rather than one-way circuit submission) as an open problem for production software stacks.
• Fault-tolerant and error-corrected workloads, where repetition-code and Toffoli constructions built from teleported gates are natural test cases.

Industry relevance. Cloud quantum providers, hardware vendors building modular devices, and HPC centers integrating quantum accelerators all face the same gap between what hardware can do and what existing SDKs can express. A backend-agnostic orchestration layer is a plausible place for that capability to live, and the paper's cost-of-abstraction comparison is the kind of evidence vendors would need before adopting one.

Future Directions

• Physically networked QPUs. The authors state directly that execution across physically networked QPUs remains future work; the current simulated channel only models placement, retry, and latency, and cannot create entanglement between independent state vectors.
• Concurrent authoring by separate parties. The present model is single-threaded, with operation order taken from a shared counter, so swapping two calls that touch a common qubit changes the plan. Supporting independently authored node programs would require an explicit merge of instruction streams or a partial order expressed through wait_for.
• Recovery after partial execution. A unit that fails after acting on the state cannot be retried without double-applying operations, and the separate executors have no timeout, so loss, duplication, and process failure are outside what is tested.
• Understanding the hardware gap. Closing the distance between observed session-to-session variation and calibration-derived noise predictions, and establishing the coherent Toffoli operation and repetition-code superposition that the current checks could not confirm.

Target Audience

Quantum software and compiler researchers, runtime and distributed-systems engineers working on quantum–HPC integration, and hardware teams designing modular or networked quantum processors. It is also valuable for practitioners who build simulators, because of the explicit adapter contract for mid-circuit measurement, and for readers who want a clear-eyed example of a framework that separates what it has proved on simulators from what it has shown on hardware.

Authors’ abstract

Distributed quantum protocols require measurement outcomes produced at one node to control operations at another. We present QQLink, a programming and orchestration layer that expresses these dependencies in a single program, using workflow nodes, deferred measurement references, and declared entanglement, and derives the cross-node coordination automatically. Its planner constructs a provably acyclic dependency graph in time linear in the total size of the instructions' qubit footprints. The same programs execute through simulator backends or are lowered to dynamic circuits on partitioned quantum hardware. We evaluate seven protocol workflows. Exhaustive feedforward-branch tests on the simulator runtime path, over tomographically complete input sets, yield output-state infidelities of at most $5\times10^{-12}$ and no incorrect classical outputs, and replaying every plan in random topological orders leaves each final state unchanged. Separate executor processes run the plans with delayed messages, with the joint quantum state held by a centralized simulation service. Every run with the full plan is correct, and removing required cross-node dependencies causes protocol failures. The lowered circuits match hand-written implementations of the same construction in two-qubit gate and conditional-block counts. Runs on two IBM Heron processors, each partitioned into virtual QPUs, demonstrate same-chip execution in two sessions a week apart. The runs also show large variation between sessions and losses beyond what calibration-derived noise models predict. Coherence-sensitive checks do not establish coherent Toffoli operation or preservation of the intended repetition-code superposition. These results support QQLink's workflow semantics on the tested execution paths and identify limits of the current hardware realization; execution across physically networked QPUs remains future work.