Parallel algebraic surgery for qLDPC codes with constant shuttling depth

AI summary

Overview

Research area: Quantum error correction and quantum computing hardware co-design — specifically quantum low-density parity-check (qLDPC) codes implemented on reconfigurable neutral-atom arrays.

Technical level: Advanced. The paper assumes familiarity with CSS codes, chain complexes, logical Pauli-product measurements, code surgery, and homological algebra over group rings.

Scope (one sentence): The paper introduces "algebraic surgery" for lifted-product qLDPC codes, a construction that keeps logical measurements inside the code's cyclic algebraic structure so that atom shuttling on neutral-atom processors requires only constant depth, and benchmarks the resulting time, qubit, and logical-error overheads against graph-based surgery.

What This Paper Is About

High-rate qLDPC codes promise large numbers of logical qubits per physical qubit, but that advantage only pays off if logical operations can be performed without expensive atom movement on the hardware. Existing surgery protocols build their auxiliary connectivity from general graphs, which gives flexible logical addressability but destroys the regular, cyclic structure that makes atom shuttling efficient. The paper's goal is to construct the surgery itself inside the same group-algebra family as the data code, so that logical measurements inherit the code's hardware-friendly symmetry and can be performed in parallel with constant shuttling depth.

Key Contributions

1. Algebraic surgery for lifted-product (LP) codes. A structured specialization of CSS code surgery in which both the data code and the auxiliary code are LP codes over the group algebra R_l = F_2[x]/(x^l + 1) for odd lift size l, attached through an injective coordinate map defined at the polynomial-ring level before expansion into binary matrices.

2. Explicit shuttling-depth bounds. The construction separates shuttling into a protograph level (routing between cyclic blocks of the unlifted seed matrices, O(log n_a) depth) and a lift level (each monomial x^s is a uniform cyclic shift a ↦ a + s mod l, realizable in constant depth). Three regimes are derived: O(log n_a + log l) for general seeds, O(log n_a) when only a bounded number of distinct monomials occur, and O(1) when nonzeros also lie on a bounded number of diagonals — all applying to memory and surgery, including return paths.

3. A logical addressability framework. Canonical logical operators are organized into cyclic logical fibres of length l and Chinese-remainder-theorem (CRT) packets, which are cyclically invariant subspaces of a fibre. Logical-selection matrices H_L (two variants, H_{L,i}^{fib} and H_{L,i,S}^{CRT}) restrict which fibres and packets are measured, and "algebraic adapters" extract joint Pauli-product measurements between blocks, including blocks with different lift sizes.

4. Hardware-model benchmarks. Shuttling-time simulations and circuit-level logical error rate simulations for three LP data codes, compared against two graph-based surgery constructions (Graph-WY and Graph-IGND).

Main Findings

• Parallel speedup: A cycle supporting 33 parallel canonical logical measurements is about 2× faster than the compared single-observable graph-based surgery schedules, with competitive qubit overhead.

• Constant shuttling depth: Under the stated layout and control assumptions, monomial edges in the auxiliary protograph lift to cyclic Tanner-graph matchings requiring O(1) shuttling depth, versus O(log w) for a general graph-based auxiliary matching of an operator of weight w.

• Z-check time overhead at l = 33: Algebraic surgery increases the Z-check time relative to memory by 24% with one AOD pair per-code-per-basis and 23% with two, whereas the graph-based schedules increase it by about 81% and 113%, respectively.

• X-check time overhead at l = 33: The algebraic overhead is 10% with one AOD pair and 9% with two, compared with 142–191% for the graph schedules with one pair and 180–233% with two.

• Qubit overhead: For parallel measurement of all l cyclic-basis logical Z operators of one fibre at l = 33, algebraic surgery uses 4785 qubits versus 8151 and 8149 for the two graph constructions — about 41% fewer qubits in this specified comparison. The algebraic approach shares one auxiliary LP code, while the graph constructions replicate l single-observable gadgets over shared data.

• Code instances studied: Data codes [[306,52,8]], [[510,76,10]], and [[1122,148, ≤20]] with lifts l = 9, 15, 33; corresponding algebraic merged codes [[585,41,8]], [[975,59,10]], and [[2442,113, ≤20]].

• CRT packet structure: For l = 15, a canonical logical fibre with cyclic operators L_0, …, L_14 decomposes into five CRT packets of dimensions 1, 2, 4, 4, 4, each supporting overlapping logical Pauli-product measurements.

• Unequal-lift adapters: For unequal odd lifts with e = gcd(l_1, l_2) > 1, a common-period constraint yields e canonical PPMs between matching residue-class products; for example, lifts 33 and 11 pair each product of three translated operators in the first fibre with one operator in the second.

• Circuit-level logical error rates at l = 33: Over the sampled range, surgery has a memory-comparable X-basis LER and a higher Z-basis LER that remains within one order of magnitude of memory. Memory tracks 148 logical observables; in the Z-basis experiment surgery tracks 148 − (33 + 2) surviving logical observables (excluding two residual operators), and in the X-basis experiment it tracks 148 observables from data-code readout plus 33 from fibre-surgery readout.

• Simulation parameters: Atomic site spacing 12 μm, maximum acceleration a_max = 5500 m/s², entangling gates of 1 μs, rest-to-rest transport time τ(L) = 2√(L/a_max); 20 rounds decoded with Relay-BP with a BP-LSD fallback; error bars are 95% confidence intervals. Reported times include shuttling, docking, gates, and scheduled returns, but exclude readout, reset, trap transfers, and within-block collision avoidance. Idling errors are not included.

Methodology in Plain English

The authors start from the standard "mapping cone" picture of code surgery: to measure a product of logical operators on a data code, you attach an auxiliary code with connection maps f_1 and f_0 satisfying a compatibility condition (H_X f_1 = f_0 ∂_1), extract the merged checks for d rounds, then measure the ancillas and classically post-process. Their twist is to pick both the data code and the auxiliary code from the lifted-product family and to specify the attachment using polynomials in x rather than arbitrary binary matrices.

Because the auxiliary code is built from the same cyclic building blocks, each nonzero monomial x^s in the protograph corresponds to a uniform rotation of an entire block of atoms — a shift by s positions modulo l. Such a rotation can be executed by shuffling rows and columns of acousto-optic deflector (AOD) tweezers, and for a favourable lift size a single cyclic shift can be realized by a Chinese-remainder-theorem layout: for l = 15, the map a ↦ (a mod 3, a mod 5) turns a shift into a column shuffle plus a row shuffle. By contrast, a general graph-based auxiliary requires arbitrary reshuffling, which costs O(log w) depth for weight w.

For addressability, the authors use the Künneth decomposition to organize logical operators on a grid, where each grid point carries a cyclic fibre of length l. They then write down selection matrices that project onto either a whole fibre or a chosen set of CRT packets, and show that changing which observables are measured only changes the selection matrix while leaving the core matrices A and D unchanged — so the auxiliary cost is amortized across many parallel measurements. A linking row in the auxiliary code (the "adapter") couples two fibres so that their operators are measured jointly.

Finally, they simulate. They model atom transport with a rest-to-rest acceleration profile, count sequential layers of collective AOD moves per syndrome-extraction round, and compare against two published graph-based surgery schedules under identical hardware assumptions. They also run circuit-level noise simulations with depolarizing gates and flip errors, decoding 20-round experiments with Relay-BP and a BP-LSD fallback.

Why This Matters

Impact on research: The paper shows that the algebraic structure of qLDPC codes can be used not only to reduce space overhead in quantum memories but also to simplify the physical implementation of logical operations. It reframes logical addressability as something that can be designed jointly with the hardware rather than bolted on afterwards, and it quantifies the trade-off: algebraic surgery gives up some of the generality of graph-based constructions in exchange for cyclic logical symmetry and structured parallel access.

Real-world applications (as discussed by the authors):

• Simulation of lattice spin Hamiltonians, where logical fibres realize one-dimensional cyclic chains of logical qubits and lattice interactions become global couplings between chains, implementable as parallel inter-fibre PPMs with cyclic shifts.
• Clifford gate implementation for fault-tolerant architectures that would otherwise require a disjoint logical basis, since the LP construction permits overlapping physical representatives and can offer higher logical encoding efficiency.
• Fibre-internal translation-invariant products, including the weight-2 intra-fibre PPMs arising in next-nearest-neighbour interactions, via CRT-packet selection.
• High-rate quantum memory architectures on neutral-atom processors, where the surgery cycle time stays close to the memory cycle time.

Industry relevance: Neutral-atom platforms are a leading candidate for scalable quantum computing, and their computational advantage depends on whether logical operations can be scheduled without prohibitive shuttling and space overheads. This work gives hardware architects a concrete recipe linking code design, logical operation design, and atom-movement scheduling, and provides timing and qubit-count numbers that resource-estimate practitioners can build on.

Future Directions

• Extending the design principles to non-product cyclic permutation codes, such as pair-partition codes, which could improve the logical encoding rate while retaining cyclic logical symmetry and structured shuttling.
• Exploring non-Abelian group algebras, which may offer richer permutation symmetries but would need a specialized addressing mechanism, since the canonical basis and packet structure used here are not generally available; recent non-Abelian lifted-product constructions such as the Mitten code introduce conditions under which a canonical basis can still be built.
• Generalizing beyond cyclic symmetry to other translation, reflection, or permutation symmetries that could define different logical-fibre structures tailored to a target application, toward application-specific fault-tolerant architectures with jointly designed codes, logical measurements, and hardware.
• Detailed resource estimates for algorithm compilation and fault-tolerant gadget evaluation, including parallel magic state preparation and teleportation, and a detailed comparison against the parallel hypergraph surgery construction of Ref. [57], whose surgery breaks the regular 2D grid structure and could incur higher time overhead.

Target Audience

Researchers and graduate students in quantum information science working on quantum error correction, qLDPC codes, and fault-tolerant architecture design; experimentalists and hardware architects building neutral-atom processors who need to understand the shuttling cost of logical operations; and theorists interested in applications of group algebras and homological constructions to quantum codes. Readers should be comfortable with CSS stabilizer formalism and chain complexes to follow the technical development, though the benchmarking results and the qualitative trade-offs are accessible to a broader hardware-oriented audience.

Authors’ abstract

Reconfigurable atom arrays provide a promising platform for high-rate quantum low-density parity-check codes, but their computational advantage depends on whether logical operations can be implemented without incurring prohibitive shuttling and space overheads. We introduce algebraic surgery for lifted product codes, co-designing the logical measurements, auxiliary codes, and atom shuttling to enable hardware-efficient Pauli-product measurements. These protocols provide flexible logical addressability subject to the cyclic-symmetry constraint, enabling a broad class of parallel logical measurements, including canonical logical operators with heavily overlapping physical supports and joint measurements within or between code blocks even with different lift sizes, while achieving constant shuttling depth on neutral-atom processors under explicit layout assumptions. In a representative hardware-model benchmark, a cycle supporting 33 parallel canonical logical measurements is about $2\times$ faster than the compared single-observable graph-based surgery schedules, with competitive qubit overhead. These shuttling and circuit-level simulations confirm that the algebraic structure of quantum low-density parity-check codes can be used not only to reduce space overhead, but also to simplify physical implementation and expand the set of efficiently accessible logical operations on neutral-atom processors.