Research
High-fidelity and robust controlled-Z gates for superconducting transmon qubits. I. Intrinsic errors and decoherence
Overview Research area: Superconducting quantum computing — optimal control of two-qubit entangling gates in frequency-tunable transmon qubits (quantum physics / quantum control engineering). Technica

- arXiv
- 2610.30056
- Published
- 2026-10-21
- Authors
- Chia-Hsien Huang, Hsi-Sheng Goan
AI summary
Overview
- Research area: Superconducting quantum computing — optimal control of two-qubit entangling gates in frequency-tunable transmon qubits (quantum physics / quantum control engineering).
- Technical level: Advanced. The paper works directly with two-transmon Hamiltonians, time-dependent flux control, Lindblad-type decoherence modeling, and numerical optimization; the summary below translates the results but the underlying arguments require graduate-level quantum information background.
- Scope in one sentence: A unified optimal-control framework that designs 12-ns controlled-Z gates for directly coupled transmons while simultaneously accounting for intrinsic Hamiltonian errors, energy relaxation, fast (electronics) dephasing, and slow (1/f flux) dephasing, calibrated against published experimental data.
What This Paper Is About
Two-qubit gates are the bottleneck in superconducting quantum processors, and improving them means understanding exactly where errors come from. The authors ask how fast, how faithful, and how noise-robust a controlled-Z (CZ) gate can be when all the real imperfections of a directly coupled pair of frequency-tunable transmons are modeled at once — including intrinsic pulse-design errors, energy relaxation, and two distinct dephasing channels tied to actual measured device data. The goal is a gate-design recipe that keeps infidelity below 10^-3 even when noise is far worse than in the calibrated device, so that large processors do not need constant per-gate recalibration.
Key Contributions
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A unified, modular optimal-control framework. Total gate infidelity is decomposed as a sum of contributions from individual error sources, so the cost function can be aimed at whichever error dominates a given device and extended to new error channels. Intrinsic dynamics and experimentally calibrated decoherence models are optimized together rather than sequentially.
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A physics-informed two-part flux pulse. The control waveform is split as Φ(t) = Φ^PBP(t) + Φ^FTP(t): a "Pull-Back-Pulse" that rapidly drives the system to a favorable operating point found from the Hamiltonian and noise model and holds it there, plus a superimposed "Fine-Tune-Pulse" that locally refines the control. This lets optimization start in a low-cost region of the control landscape.
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A hierarchical intrinsic-error decomposition. The intrinsic error is separated into phase, swap, and leakage contributions; phase error splits into a relative local phase part and a deviation of the coupling phase from π; swap error splits into the |0_B1_A⟩↔|1_B0_A⟩ and |0_B0_A⟩↔|1_B1_A⟩ rotations; leakage splits into odd- and even-quanta (Quanta-m) pathways, further resolved by destination state. This tells simulators how many transmon levels must be kept.
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Realistic, measurement-calibrated noise models plus an AWG-aware fine-tuning step. Fast dephasing (modeled as white noise from room-temperature control electronics) and slow dephasing (1/f flux noise) are built from published Ramsey coherence data and CZ error budgets, and a post-optimization procedure compensates finite-bandwidth arbitrary-waveform-generator (AWG) distortion.
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Transmon asymmetry as a design knob. The Josephson energy ratio a_EJ = E_J1/E_J2 is shown to select between noise-resilient operating regimes, with an optimum determined by the relative strengths of fast versus slow dephasing.
Main Findings
- Near-speed-limit gate. Using smooth single-shot flux pulses and the optimal asymmetry a_EJ = 1.31, the authors obtain a 12-ns CZ gate, close to the theoretical speed limit of 11.6 ns, with intrinsic errors suppressed to the 2×10^-5 level.
- Total infidelity dominated by relaxation. Under the noise conditions reported in the referenced experiment, the optimized total infidelity is 4.66×10^-4, of which 4×10^-4 comes from energy relaxation at T1 = 30 μs, 4.11×10^-5 from total dephasing, and 2.46×10^-5 from intrinsic error.
- Material-limited projection. With state-of-the-art coherence times (T1 = 360 μs, achievable with tantalum or similar materials), the projected total infidelity drops to 9.90×10^-5, below commonly cited fault-tolerance thresholds.
- Two dephasing sweet spots, and they can coincide. The slow-dephasing sweet spot is where dΔ/dΦ = 0; the fast-dephasing sweet spot lies in the lower-frequency regime. For asymmetric transmons both coincide at Φ/Φ0 = 0.5, offering simultaneous suppression of both dephasing mechanisms.
- Asymmetry trades one noise source against the other. Strongly asymmetric transmons have smaller |dΔ/dΦ| across the tunable range and resist slow (flux) dephasing; weakly asymmetric transmons reach lower frequencies over their larger tuning range and resist fast dephasing. Stronger slow dephasing favors larger asymmetry; stronger fast dephasing favors smaller asymmetry.
- Quantified robustness margins. The optimized gate stays below 10^-3 infidelity under a sevenfold increase in fast-dephasing strength or a fourfold increase in slow-dephasing strength (the other held at its experimental level). Strongly asymmetric transmons (a_EJ = 11.0) tolerate slow-dephasing noise up to 90× the experimentally characterized level; weakly asymmetric ones (a_EJ = 1.1) tolerate fast-dephasing noise up to 10×, both while keeping infidelity below 10^-3.
- AWG bandwidth is a real but fixable problem. For a representative commercial AWG with cutoff ω_c/2π = 424.7 MHz, filtering raises intrinsic infidelity from 1.80×10^-5 to 1.14×10^-2; the proposed fine-tuning procedure brings it back to 2.05×10^-5.
- Model validation. Noise realizations reproduce the experimentally measured qubit-frequency dependence of the fast and slow dephasing times T_φ,1 and T_φ,2, supporting use of the models for quantitative prediction.
- Context for the state of the art. Experimentally demonstrated CZ fidelities in transmon systems are cited as above 99% and up to 99.93%.
Methodology in Plain English
The authors start from a clean mathematical model of two neighboring transmons coupled directly, each with its own frequency, anharmonicity, and flux-tunable frequency set by a SQUID loop with two Josephson junctions. Because there is no microwave drive, the Hamiltonian only moves population between states of the same total excitation number, or by jumps of two quanta — this partitions the state space into even- and odd-quanta sectors and tells the authors exactly which leakage paths exist.
They then compute the error of a freely evolving "drift" gate as a function of gate time, breaking it into leakage, swap, and phase pieces, and use that picture to design pulses. The flux pulse is shaped as a fast pull-back segment that parks the system at a chosen operating point plus a small fine-tuning wiggle on top; numerical optimization then tunes both. Because real waveform generators cannot produce arbitrarily sharp pulses, they pass the optimized pulse through a filter model of the AWG and re-tune it.
For noise, they build two separate dephasing models — a fast white-noise channel describing room-temperature control electronics, and a slow 1/f flux-noise channel — and calibrate both against published Ramsey coherence measurements and the published error budget of a real device. They then use these to map out where the qubit is insensitive to flux (the "sweet spots") and how asymmetric the SQUID junctions should be. Finally they sweep the noise strength upward to see how much abuse each configuration tolerates before the gate infidelity crosses 10^-3.
Why This Matters
Robustness, not just peak fidelity, is what makes quantum hardware scale. The paper shows quantitatively how much noise a well-designed CZ gate can absorb before needing recalibration, and how a fabrication-level parameter (junction asymmetry) can be chosen to buy tolerance against the dominant noise channel in a given lab.
- Fault-tolerant quantum computing: projected infidelities of 9.90×10^-5 with T1 = 360 μs sit below commonly cited fault-tolerance thresholds, relevant to quantum error correction overhead.
- Cryptography, materials science, drug discovery, and artificial intelligence: the paper motivates fault-tolerant universal quantum computing by these downstream application areas.
- Large-scale processor operation: the 90× (slow dephasing) and 10× (fast dephasing) tolerance margins translate into relaxed characterization and calibration requirements, addressing the growing calibration bottleneck as qubit counts grow.
- Inhomogeneous hardware environments: because gates retain fidelity under several-fold local noise variation, chips with spatially varying flux-noise environments become more viable.
Industry relevance: the results are aimed squarely at superconducting foundry and control-electronics practice — junction asymmetry is a fabrication choice, and the AWG bandwidth analysis (424.7 MHz cutoff) connects directly to commercial room-temperature control stacks. The framework offers a path to fewer calibration cycles per gate on multi-qubit machines.
Future Directions
- Systematic parameter uncertainties. The authors explicitly defer this to a companion paper (Part II), which extends the framework to imperfect parameter knowledge, device-to-device variation, and temporal drift — the remaining error class not treated here.
- Extending to other coupling architectures. The direct-coupling model is presented as a foundation to be carried over to resonator-mediated coupling, tunable couplers, and double-transmon couplers by adding the corresponding coupling dynamics and decoherence channels.
- Experimental validation of the predicted robustness margins. The 7×/4×/10×/90× tolerances and the 9.90×10^-5 tantalum-material projection are simulation results; testing them on fabricated devices with controlled noise injection is the natural next step.
- Applying the hierarchical error decomposition and AWG-aware tuning to larger pulse libraries. Whether the pull-back-plus-fine-tune pulse ansatz and the post-optimization filter compensation scale to multi-gate calibration workflows is left open.
Target Audience
Graduate students and researchers in superconducting quantum computing and quantum control, especially those working on two-qubit gate calibration, pulse-level optimization, or flux-noise mitigation. It is also useful for hardware engineers who choose junction asymmetry and control electronics (AWG bandwidth) and want to know how those choices propagate into gate error budgets. Readers without a background in Hamiltonian dynamics and open-quantum-system modeling will find the technical sections demanding, though the abstract-level results and robustness numbers are accessible.
Authors’ abstract
Fault-tolerant quantum computing requires quantum gates that combine short duration, high fidelity, and robustness to noise. As quantum processors scale, robustness becomes increasingly important because exhaustive characterization and frequent recalibration of individual gates become impractical. We present a comprehensive optimal-control framework for controlled-Z (CZ) gates between directly coupled, frequency-tunable transmons that systematically accounts for intrinsic Hamiltonian errors and realistic decoherence mechanisms, including energy relaxation and dephasing. Using smooth, single-shot flux pulses, we obtain 12-ns CZ gates---close to the theoretical speed limit of 11.6 ns---with intrinsic errors suppressed to the $2\times10^{-5}$ level. We construct dephasing noise models, calibrated against published experimental measurements, that capture fast dephasing from room-temperature control electronics and slow dephasing from $1/f$ flux noise. Using these models, we identify dephasing sweet spots that suppress sensitivity to dephasing noise. We further exploit transmon asymmetry as a design parameter to access distinct noise-resilient operating regimes. These results establish an experimentally applicable framework for balancing gate speed, fidelity, and noise robustness while reducing characterization and recalibration overhead.