Geometry-optimized hyperbolic codes for modular fault-tolerant quantum architectures

AI summary

Overview

Research area: Quantum error correction and fault-tolerant quantum architecture, specifically hyperbolic surface codes (qLDPC codes defined on negatively curved surfaces) and their compilation onto modular superconducting hardware.

Technical level: Advanced. The paper assumes familiarity with stabilizer codes, CSS codes, homology-based code distance, coset/triangle-group constructions, and quantum LDPC bounds (BPT, Delfosse), and it reports circuit-level Monte Carlo threshold estimates.

Scope (one sentence): The paper exhaustively searches a family of self-dual hyperbolic surface codes built from prime-field PSL(2,q) quotients, shows that optimizing periodic boundary identifications raises code efficiency by up to a factor of four at fixed qubit count, and introduces a topology-aware compiler that partitions these codes into planar modules of at most 80 qubits for modular fault-tolerant hardware.

What This Paper Is About

Surface codes are attractive because they are geometrically simple and experimentally proven, but on a flat 2D lattice the Bravyi–Poulin–Terhal bound forces the efficiency metric kd²/n to be O(1), so long distances come at the cost of vanishing encoding rates. Hyperbolic surface codes escape this by placing qubits on high-genus surfaces, where Delfosse's bound permits kd²/n ≤ C(log k)², but it was unclear whether concrete, finite, low-check-weight constructions actually realize that growth and how they could be laid out on real hardware. This paper does both: it searches for the best finite hyperbolic codes in a restricted algebraic family and then builds a routing/partitioning scheme that maps them onto bounded planar modules while measuring the resulting communication cost.

Key Contributions

1. An exhaustive algebraic search over self-dual hyperbolic codes. The authors enumerate regular {p,p} tilings for p ∈ {5,6,7,8} across all 17 primes q < 60, giving 68 tiling–field pairs and 136 cases when both face–vertex swap labels are recorded. Of these, 115 cases contain no candidate generators; the remaining 21 cases yield 2,304 candidate generator pairs forming 38 centralizer classes, each verified to satisfy the triangle-group relations and to produce a valid, closed, orientable, fully connected cellulation.

2. Efficiency optimization through periodic identifications. They show that changing only the compactification (the periodic boundary conditions), while holding qubit count, encoding rate, and check weight fixed, can double the code distance and therefore quadruple the efficiency η = kd²/n. In the {7,7} family at q = 41, different identifications give exact distances of 4, 6, and 8.

3. A topology-aware modular compilation algorithm. A three-phase protocol (face partitioning on the dual graph, physical qubit assignment with a cost function, and validation) partitions a hyperbolic code into modules of at most B_max = 80 qubits, each module forming a connected planar region that is a strict topological disk. The compiler preserves every data qubit and parity check, leaving [[n,k,d]] unchanged.

4. Circuit-level noise benchmarking of monolithic versus modular layouts. Using a model where a remote CNOT has error probability αp versus baseline p for local gates, they estimate finite-size thresholds for both layouts and quantify degradation when long-range gate error is tripled.

Main Findings

• Best code found: The global optimum in the searched space is a {6,6} code [[51330, 17112, 10]] with efficiency η ≃ 33.34, encoding over 17,000 logical qubits. This is about a ×33.34 improvement over the Euclidean toric code, which has η = 1.

• Per-tiling optima differ from rate optima: {5,5} at q = 59 gives [[51330, 10268, 12]] with η = 28.81; {7,7} at q = 41 gives [[17220, 7382, 8]] with η = 27.44; {8,8} at q = 47 gives [[25944, 12974, 8]] with η = 32.00. Although {8,8} has the highest asymptotic rate r∞ = (p−4)/p = 1/2, its shorter distance leaves it below the {6,6} code (r∞ = 1/3). The asymptotic rates listed are 1/5, 1/3, 3/7, and 1/2 for p = 5, 6, 7, 8 respectively.

• Identifications can quadruple efficiency for free: Selecting the distance-8 map over a distance-4 map at the same tiling, quotient group, qubit count, check weight, and encoding rate doubles d and quadruples η, with no extra data qubits, no heavier checks, and no additional two-qubit interactions per syndrome round.

• Finite-size scaling consistent with Delfosse's bound: For the selected {5,5} sequence (five instances, from [[30,8,3]] with η = 2.40 up to [[51330,10268,12]] with η = 28.81), the fit is d ≃ 1.265 ln k + 0.543 (R²_fit = 0.997) and η ≃ 0.328 (ln k)² + 1.530 (R²_fit = 0.996). For the {7,7} sequence (four instances, from [[84,38,3]] with η = 4.07 up to [[17220,7382,8]] with η = 27.44), the fit is d ≃ 0.932 ln k − 0.278 (R²_fit = 0.997) and η ≃ 0.347 (ln k)² − 0.148 (R²_fit = 0.998). The normalized efficiency η/(ln k)² ranges from about 0.338 to 0.555 for {5,5} and from 0.308 to 0.362 for {7,7}.

• Comparison to hyperbolic Floquet codes: The best hyperbolic Floquet instance reported in the compared work is [[19200, 962, 10]] with η ≃ 5.01. The {6,6} result is roughly a ×6.65 improvement; the {7,7} result exceeds it by about ×5.48 while using roughly 10.3% fewer data qubits.

• Communication metrics for reference layouts: For the {5,5} code, n_total = 92,394, M = 1,155 modules, module loads 77–80, R = 69,021, K = 57,382. For {6,6}, n_total = 85,550, M = 1,070, loads 68–80, R = 83,962, K = 69,544. For {7,7}, n_total = 27,060, M = 339, loads 67–80, R = 31,967, K = 25,723. For {8,8}, n_total = 38,916, M = 487, loads 68–80, R = 52,223, K = 41,186. All 20 layouts (five independent initializations for each of four codes) satisfy the load and geometric constraints.

• Stability across initializations: Median values track the reference layouts closely, with relative ranges of 0.60% (R) and 0.48% (K) for {5,5}; 0.28% and 0.21% for {6,6}; and 0.29% and 0.36% for {7,7}.

• Compiler outperforms spectral partitioning: The reference topology-aware layouts reduce all five communication metrics relative to the tested load-feasible spectral-partitioning assignments. The baselines compared are recursive spectral bisection on the dual graph and Mt-KaHyPar applied directly to the Tanner graph; neither baseline enforces the geometric planarity constraints.

• Threshold degradation from noisy long-range gates: Tripling the long-range gate error probability mildly lowers, but does not eliminate, the estimated error-correction thresholds in either the modular or the monolithic layout. The numerical threshold values themselves are not included in the excerpt of the paper provided here.

Methodology in Plain English

The authors build codes from regular hyperbolic tilings, where each face is a p-sided polygon and each vertex has p edges meeting it. Qubits sit on edges; each face defines a Z-type check and each vertex defines an X-type check, both of weight p, and each data qubit belongs to exactly two checks of each type. To get a finite code, they "wrap up" a patch of the infinite tiling by identifying its edges, mathematically by taking a quotient of the tiling's symmetry group by a finite group. They restrict these quotient groups to PSL(2,q) for prime q, which makes the code size exactly n = |Q|/2 with |Q| = q(q²−1)/2, and they force a face–vertex symmetry via an involution J so that y = JxJ⁻¹.

Because a given tiling and group order still allow many different choices of generators, they enumerate all inequivalent choices (grouping them into orbits under the centralizer of J), verify that each one forms a valid closed surface, and compute the code distance as the shortest non-trivial cycle (systole) separately for X-type and Z-type logical operators. They then rank codes by η = kd²/n.

For hardware, they treat the syndrome-extraction circuit as a bipartite Tanner graph with n(1 + 4/p) total qubits including ancillas. Their compiler first partitions the faces of the tiling into M connected regions of roughly equal size (aiming for topological disks), then assigns data qubits and ancillas to modules while minimizing a cost function that penalizes split checks and module overload, and finally checks capacity (B_min to 80 qubits) and planarity. They score layouts with five metrics: total remote interactions R, check fragmentation K, the number of communicating module pairs, the maximum number of communication partners per module, and the maximum remote-interaction count per module. Finally, they run circuit-level Monte Carlo simulations in which remote CNOTs have error probability αp instead of p, to see how thresholds respond to noisier long-range links.

Why This Matters

This work moves hyperbolic surface codes from a theoretical curiosity to a concrete architectural blueprint, addressing two of the four hurdles the authors identify: optimizing compactification to exploit the optimal kd²/n scaling, and routing non-local connectivity in a hardware-compatible way. It shows that the efficiency advantage persists at the large code sizes relevant to large-scale fault tolerance, and that it can be captured without increasing check weight, qubit count, or syndrome-round interaction count.

Potential real-world applications:

• Quantum memory for fault-tolerant processors: high-rate, high-distance codes needing fewer physical qubits per logical qubit than the toric code.
• Superconducting chip and multi-chip architecture design: layouts that split a code across bounded modules with inter-module links.
• Quantum compiler and EDA tooling: the topology-aware partitioning algorithm as a routing/placement pass for qLDPC codes.
• Distributed or networked quantum computing: modular partitioning maps naturally onto systems linked by photonic or microwave interconnects.

Industry relevance: the results target superconducting hardware specifically, using capacity limits of 80 qubits per module and inter-module gate models, which speaks directly to vendors building modular superconducting processors and to teams developing compilation stacks for qLDPC codes. The honest reporting of threshold degradation under noisy long-range gates is also relevant to assessing whether modular qLDPC architectures are worth the interconnect engineering cost.

Future Directions

• Full threshold characterization: the excerpt does not include the numerical threshold values, and the paper frames threshold degradation under α = 3 as "mild but non-eliminating," leaving open how thresholds behave across a wider range of α, module sizes, and code parameters.
• Extending beyond prime fields and the searched range: the exhaustive claim is limited to regular, closed {p,p} self-dual codes with PSL(2,q) quotients for q < 60; larger q, composite fields, and non-self-dual constructions are open territory, especially given the observation that increasing q does not always improve distance.
• Decoder development for hyperbolic codes: established decoding methods are cited for Euclidean surface codes, but a decoder matched to these high-genus layouts and to the modular communication pattern is a prerequisite the paper does not supply.
• Fault-tolerant logical operations and experimental realization: the paper cites prior work on logical operator construction and on resonator-based emulation of the Poincaré metric, but a complete logical-gate protocol and a physical demonstration of a full modular hyperbolic memory remain future work.

Target Audience

Quantum error-correction researchers and graduate students working on qLDPC and topological codes; architectural and compiler engineers designing modular superconducting quantum processors; and mathematically inclined readers interested in the practical use of hyperbolic tilings, triangle groups, and PSL(2,q) quotients for code construction. It is best suited to readers already comfortable with stabilizer formalism and homology-based distance, though the architectural and routing sections are accessible to hardware-focused readers.

Authors’ abstract

Quantum fault tolerance is a prerequisite to harness the full potential of quantum computers. However, achieving fault tolerance remains a major challenge since it requires optimizing tradeoffs between several intertwined theoretical and experimental parameters, including the encoding rate, code distance, parity-check weights, code planarity, and routing. Surface codes remain strong candidates for fault tolerance due to their simple geometric structure, established decoding methods, locality, and experimental attainability. In this work, we present finite families of hyperbolic surface codes that leverage the optimal efficiency scaling $kd^2/n = C (\log{k})^2$ attainable by surface codes with bounded local geometry. We show that optimizing the periodic identifications can double the code distance and thereby increase the code's efficiency by a factor of four, at fixed qubit count, encoding rate, and parity-check weight. We also address the routing problem of hyperbolic surface codes by introducing a topology-aware algorithm that partitions a hyperbolic code into bounded planar modules while reducing long-range communications demand. Circuit-level Monte Carlo simulations yield finite-size threshold estimates for both modular and monolithic layouts, showing that tripling the long-range gate error probability mildly lowers, but does not eliminate, the estimated error-correction thresholds. Together, these results strengthen the case for hyperbolic surface codes as structured and highly efficient large-scale quantum error correction codes for future fault-tolerant architectures.