Development and experimental implementation of noise characterisation techniques on a superconducting quantum processor

AI summary

Overview

Research area: Quantum computing hardware characterisation — noise learning and noise-model validation on a superconducting quantum processor.

Technical level: Advanced. The paper assumes familiarity with Pauli–Lindblad noise models, cycle benchmarking, randomised compiling/Pauli twirling, nonnegative least squares, and tensor-network process tomography.

Scope (one sentence): The authors develop, implement, and experimentally validate two noise-characterisation techniques — a regularised cycle-benchmarking protocol and a two-dimensional tensor-network channel tomography — on the 53-qubit square-lattice superconducting processor VTT Q50, then use the learnt models to map noise structure, track drift, and validate model predictions against benchmark physics and chemistry circuits.

What This Paper Is About

Noise-aware error mitigation only works if the noise of the device is known accurately, but extracting that noise is a trade-off: cycle benchmarking is efficient yet cannot resolve every noise parameter, while tomography is precise but expensive and needs detector tomography. The authors close this gap for a specific machine, VTT Q50, by revising both families of methods so they fit the device's square-lattice topology and by checking whether the resulting noise models actually predict measured circuit outcomes. The goal is not only better error mitigation but also a diagnostic picture of which error channels dominate and how stable they are over time.

Key Contributions

1. A revised cycle-benchmarking protocol with a regularised cost function. The authors replace the standard "symmetry assumption" used to fill in unlearnable Pauli fidelities with a ridge (L2-regularised) nonnegative least-squares fit over only the quantities that are actually measurable, reducing bias in the reconstructed sparse Pauli–Lindblad rates.

2. Extension of tensor-network channel tomography to two-dimensional device layouts and to repeated layer execution. A previously developed tensor-network tomography method is adapted from one- to two-dimensional topology, and its accuracy is improved by executing the noisy layer repeatedly.

3. Approximate sublayer noise models derived from parent layers. Both methods allow approximate noise models of circuit sublayers to be extracted from the parent layer's model, targeting scenarios that prioritise effectiveness over precision.

4. Experimental deployment and validation on VTT Q50. The authors map the noise structure and intensity in typical one- and two-dimensional layers, study sublayer trimming and drift over time, and validate the learnt models against measured noisy signals in many-body dynamics with controllable magic and in quantum-chemistry ground-state preparation circuits.

Main Findings

• Device and calibration statistics: VTT Q50 is a 53-qubit transmon processor with flux-tunable qubits and tunable couplers. In the calibration set of 2026-08-21, the median infidelities were 1.2 × 10⁻³ for PRX single-qubit gates, 9.6 × 10⁻³ for CZ gates, and 2.9 × 10⁻² for readout. Single-qubit error rates are about one order of magnitude lower than two-qubit rates, making entangling gates the main characterisation target. Readout errors are typically the largest, motivating detector tomography in the tomographic approach and TREX or reconstructed noisy POVMs at the validation stage.

• Nine measurement bases suffice: For the local sparse Pauli–Lindblad model, nine measurement bases are enough regardless of qubit number, provided the active layout satisfies an ordering condition on the qubit graph. The square-lattice coupling map of VTT Q50 satisfies this condition, and the basis construction is equivalent to a covering array CA(N; 2, k, 3).

• Unlearnable degrees of freedom bias the standard approach: For a single CZ gate, the fidelities f_IX and f_XI are individually unlearnable; only certain products (e.g. f_IX f_ZX, f_IY f_ZY, f_XI f_XZ, f_YZ f_YI, f_IX f_ZY, f_XI f_YZ) plus the invariant fidelities f_II, f_IZ, f_ZI, f_ZZ, f_XY, f_XX, f_YY, f_YX are learnable. This is a gauge freedom of the cycle-benchmarking data, not a protocol flaw. The symmetry-based augmentation used in practice introduces reconstruction bias.

• Quantified bias of the symmetry assumption: In simulations with 20 repetitions, ground-truth rates drawn from a normal distribution with mean μ = 2 × 10⁻³ and standard deviation 5 × 10⁻⁴, readout error probabilities p(0|1) = 0.025 and p(1|0) = 0.010, 256 shots per randomisation, 100 randomisations per depth, and depths d = 0, 2, 4, 8, 16, 32, 64, the symmetry assumption consistently overestimated the weight-two coefficient in each unlearnable pair (in some cases by more than a factor of two) while suppressing the conjugated weight-one rate, sometimes to zero.

• Regularisation removes most of that bias: Ridge regularisation with τ = 10⁻² (fixed by minimising mean residual coefficient error against known ground truth) substantially reduced the bias on coefficients tied to unlearnable degrees of freedom, and the inferred rates clustered around the ground-truth mean with no overestimated or vanishing entries. The penalty is equivalent to a maximum-entropy selection among gauge-equivalent models under a fixed total error-rate constraint. Regularisation does not make unlearnable parameters learnable — it selects one solution by a stated criterion. All hardware coefficients in the experimental section are obtained this way.

• Noise stability and achievable circuit sizes: Using the high-accuracy noise characterisation to track drift, and extrapolating from the best-performing qubits, the authors report that the total estimation error (statistical plus systematic) in optimally noise-mitigated observables can be below 13% for circuits with 400 two-qubit entangling gates (depth L = 15, width N = 50, for highly nonlocal observables) and 10⁸ measurement shots, assuming the optimal error-mitigation tool is used.

• Model validation: Learnt noise models were checked by comparing model-predicted noisy signals against measured outcomes in benchmark many-body (controllable magic) and quantum-chemistry ground-state circuits; the abstract states that the adequacy of the learnt models was assessed this way. Detailed per-layer error-rate numbers from Sections VI and VII are not contained in the provided excerpt.

Methodology in Plain English

The team treats the processor's noise as a set of "rates" attached to single qubits and to neighbouring qubit pairs, an assumption made legitimate by a standard trick called Pauli twirling, which forces hardware noise into a simple diagonal form.

For the first method, they run cycle-benchmarking circuits: prepare an eigenstate of a chosen Pauli operator, repeat a layer of CZ gates an even number of times, and watch the signal decay exponentially. The decay rate gives a "fidelity" for that Pauli operator. Random single-qubit bit-flips before measurement (TREX-style) suppress readout error. Because CZ gates shuffle some Pauli operators into others, certain fidelities can only be measured in pairs. The usual fix is to assume the two members of a pair are equal and split the product in half — an assumption the authors show is biased. Instead, they fit only measured products, which leaves the fit underdetermined, and add a small quadratic penalty on the size of the rates. This picks the "most spread out" solution consistent with the data, which turns out to be far closer to the truth.

For the second method, they reconstruct the full noise channel of a layer using a tensor-network parametrisation (a locally purified density operator) instead of the exponentially large Choi matrix, extending the construction from a one-dimensional to the two-dimensional qubit layout of the device. Repeating the noisy layer several times amplifies its effect relative to state-preparation and measurement errors, improving accuracy. Both routes also permit a shortcut: model a small sublayer approximately from the model of a larger parent layer when speed matters more than precision.

Finally, they test whether the learnt models are actually right by predicting the noisy output of realistic benchmark circuits and comparing with what the hardware produced, and they repeat characterisation over time to see how much the noise parameters drift.

Why This Matters

Reliable error mitigation is only as good as the noise model underneath it; this paper shows how to get a less biased model from a fixed measurement budget and, equally importantly, how to check that the model is trustworthy. It also demonstrates that noise characterisation doubles as a hardware diagnostic, revealing which channels dominate and how stable they are — information that aggregated calibration data obscures.

Real-world applications:

• Calibration and benchmarking of commercial superconducting hardware — replacing coarse aggregated metrics with layer-level Pauli–Lindblad models that vendors and users can act on.
• Error-mitigated quantum chemistry and materials simulations — the paper explicitly validates models on quantum-chemical ground-state preparation circuits, the leading near-term application.
• Error-mitigated many-body physics experiments — validated on many-body dynamics with controllable magic, relevant to studying entanglement and simulability.
• Resource planning for near-term algorithms — the 13% / 400-gate / 10⁸-shot estimate gives practitioners a concrete scale at which mitigation is expected to remain useful.

Industry relevance: the work is a collaboration between Algorithmiq (error-mitigation software) and users of the IQM/VTT-built VTT Q50, so it directly informs how error-mitigation products are calibrated against real superconducting backends, and how hardware roadmaps (gate fidelity, readout, drift) should be prioritised.

Future Directions

• Removing the remaining gauge ambiguity — regularisation picks a solution by a stated criterion, but the unlearnable degrees of freedom remain fundamentally unresolvable within cycle benchmarking; better physical priors or complementary experiments are needed.
• Scaling the two-dimensional tensor-network tomography — bond dimension, shot budget, and runtime at larger widths and more layers are open questions, as is the accuracy cost of the sublayer-trimming approximation.
• Handling non-Markovian and drifting noise — the paper identifies non-Markovian effects and parameter drift as sources of systematic error in all noise-mitigation protocols; incorporating time-correlated noise into these characterisation pipelines is a natural next step.
• End-to-end validation at larger circuit sizes — the 13% estimate for 400 two-qubit gates at width 50 is an extrapolation from the best-performing qubits assuming scalability, and testing it on actual wide, deep mitigated circuits remains to be done.

Target Audience

Quantum-hardware experimentalists and characterisation engineers working on superconducting platforms; researchers building or applying noise-aware error mitigation (tensor-network error mitigation, probabilistic error amplification, probabilistic error cancellation); quantum-software and compiler teams who need calibrated noise models for a specific backend; and graduate students or advanced practitioners in quantum information who want a concrete, experimentally grounded treatment of cycle benchmarking and tensor-network channel tomography, including the practical pitfalls of unlearnable parameters.

Authors’ abstract

Noise characterisation not only enables error mitigation but also provides valuable information about the intrinsic performance of a quantum device, identifying dominant error contributions and bounding noise stability well beyond the aggregated calibration data. Deploying such methods on a specific hardware topology must combine efficiency and accuracy, assess noise stability, and validate the reconstructed noise model. Here we develop and implement these methods on a superconducting processor with square-lattice topology. First, we revise the cycle-benchmarking protocol and reduce the bias arising from unlearnable degrees of freedom via a regularised cost function. Second, we extend a previously developed tensor-network tomography method to match the device layout and show how its accuracy can be improved by repeated layer execution. Both methods allow approximate sublayer noise models to be extracted from parent ones. Using noise characterisation as a tool, we map the noise structure, track drift, and validate the adequacy of the learnt noise models against experimentally observed noisy estimations in benchmark physical and chemistry circuits. These results inform further improvements in the underlying technology and provide estimates of the size of noise-mitigated circuits that the device can support.