Compiler Framework for 3D Neutral-Atom Quantum Computers

AI summary

Overview

Research area: Quantum computing systems — specifically compilation software for neutral-atom quantum processors built from optical tweezer arrays, combined with 3D atom-transport hardware modeling (acousto-optic deflectors, AODs, and acousto-optic lenses, AOLs).

Technical level: Advanced. The paper assumes familiarity with Rydberg blockade gates, AOD tone ordering, optical beam propagation, and VLSI-style placement-and-routing.

Scope (one sentence): The paper introduces Cubism, a layered three-dimensional neutral-atom architecture that stacks storage, entanglement, and readout regions along the vertical (z) axis, and Piqasso, the first end-to-end compiler targeting it, evaluated on 34 benchmark circuits against a state-of-the-art planar compiler.

What This Paper Is About

Neutral-atom quantum computers can now hold atoms in three-dimensional tweezer arrays, but every existing compiler still assumes the atoms sit in a single flat plane. In a flat array, atoms must travel farther and farther sideways as the array grows, they lose coherence during that travel, and moves that would cross each other cannot run in parallel. The paper's goal is to exploit the unused vertical axis so that gate partners meet via short vertical hops instead of long lateral journeys, and to build a compiler that respects the real optical and transport constraints of such a machine.

Key Contributions

1. A 3D layered architecture (Cubism). Storage regions occupy most layers, a dedicated entanglement layer sits near the middle of the stack at height z_E where all two-qubit gates rendezvous for a global Rydberg pulse, and a far-separated readout layer at the top isolates measurement. The design is motivated by the layer selectivity of 3D beam optics: focused Gaussian beams propagate along z and thread the whole stack with only algebraic on-axis decay, whereas in-plane light sheets are exponentially confined to one layer.

2. A formal statement of the 3D compilation problem under coupled constraints. The paper identifies three constraint families any such compiler must satisfy: AOD no-crossing (column and row tones may never invert order, even transiently), frame collision (concurrent frames must not share focal planes within Δz_min with overlapping in-plane footprints), and axial clearance (atoms sharing an (x, y) column must stay at least Δz_min apart vertically, since addressing light leaks onto column neighbors).

3. Piqasso, the first end-to-end 3D neutral-atom compiler. It combines clearance-aware analytical placement (a force-directed continuous optimization followed by hardware-aware legalization, in the VLSI tradition), lift-and-hop routing through a reserved free transit layer, blockade-aware rendezvous batching on z_E, and multi-AOD scheduling that packs moves into non-crossing frames across parallel AOD subsystems.

4. A quantitative cost–benefit accounting of the third dimension on both parameterized circuit families and an application suite, isolating the architectural difference by giving the planar baseline identical hardware parameters.

Main Findings

• Transport distance: Across 34 circuits, Piqasso reduces total atom transport distance by 2.1× on average relative to the Planar-ZAP baseline. At the largest parameterized sizes the reduction is 2.2–2.7×.
• Execution speed: Piqasso is faster on 32 of 34 circuits, with up to 7.3× faster execution reported in the abstract and a 3.1× execution-time reduction specifically on 100-qubit QFT, with the gap widening at scale.
• Fidelity: The shorter travel yields 2.2× higher movement fidelity, with the advantage concentrated at the scales where the planar baseline degrades most.
• Serialization: The 3D register incurs roughly 3× fewer serialization conflicts and requires 1.8× fewer AOD transport rounds than ZAP.
• Placement intuition is inverted by the architecture: Because every gate meets at z_E, each atom pays only its own short axial hop regardless of which storage layer it occupies. The paper therefore sets the axial weight s_z = 0.15 (below 1) to deliberately spread qubits across layers, relieving the in-plane crowding that actually drives transport cost — the opposite of what slower axial speed (v_z = 0.40 μm/μs versus v_xy = 0.55 μm/μs) would naively suggest.
• Cross-round pipelining matters: In a planar machine the descent of one pulse round and the ascent of the next travel in opposite directions through a shared plane, forcing tone crossings and serializing the handoff. In Cubism these moves are near-axial and pack into non-crossing frames, so the vertical round trips do not inflate the transport-round count.
• Crosstalk reduces to unity by construction: The axial-clearance constraint plus dedicated entanglement and transit layers keep all non-participating atoms outside crosstalk-exposure regions, though the term is retained in the fidelity model so a relaxed layout would be penalized.
• Readout overlap: Because the readout layer is axially separated, the 500 μs resonant imaging of an evacuated qubit overlaps with ongoing computation on other layers; a measured qubit is charged only for transport to the readout layer, never for the readout dwell, and stops accumulating idle decoherence and spectator exposure once resident there.

Methodology in Plain English

The authors start from a hardware observation rather than an algorithm: different laser fields behave very differently in a stacked register. Beams focused along the stacking axis (traps, tweezers, single-qubit addressing spots) decay only slowly along that axis, so they thread every layer and force a minimum vertical separation between atoms sharing a column. In-plane light sheets, by contrast, are exponentially confined, which is what makes a dedicated entanglement layer physically sensible. This asymmetry is what the compiler is built around.

The compiler pipeline has four stages. First, placement: rather than solving a discrete combinatorial problem by annealing or greedy heuristics, the authors run a continuous force-directed optimization on a weighted interaction graph, where edge weights decay over circuit stages so early interactions dominate. Frequently interacting qubits attract toward a preferred separation of 2.5 (matching the gate distance d_g), while a 1/d Coulomb-like repulsion prevents overlap. The distance metric is anisotropic, with z weighted by s_z = 0.15. Positions are then legalized onto real SLM sites by processing qubits in descending weighted degree and picking the site minimizing distance plus a large penalty for axial-clearance violation.

Second, routing: single-qubit gates run in place (they are individually addressed and need no transport). Each two-qubit gate gets a rendezvous pair placed symmetrically on the entanglement layer about the pair's in-plane midpoint, separated by d_g = 2.5 μm. Gates are packed into pulse rounds by greedy independent-set construction on a blockade-conflict graph: two gates may share one global Rydberg pulse only if their rendezvous centers are at least r_b + d_g apart, where the blockade radius r_b = 5 μm. When a move's in-plane path would cross an obstacle, it instead lifts to a free transit layer, translates unobstructed, and lowers back — the "lift-and-hop" maneuver, which has no planar analogue and needs no extra hardware since an atom in flight is held by the AOD/AOL tweezer alone.

Third, scheduling: moves are greedily legalized into a near-minimal number of non-crossing single-focal-plane frames, one per AOD subsystem, with concurrent frames permitted as long as they do not collide. The descent of round k and the ascent of round k+1 involve disjoint atoms on complementary paths, so they merge into one batch; a batch that would collide can be admitted via lift-and-hop when the marginal time is below the cost of opening a new transport round.

Fourth, readout mapping: completed qubits migrate to the top readout layer, while qubits needed later return to the nearest free storage site, both reusing the same non-crossing, lift-and-hop transport.

Timing uses a minimum-jerk trajectory with peak velocity 15/8 times the mean, capped at the hardware bounds, giving Δt = (15/8)(|d_z|/v_z + d_xy/v_xy). The optimization objective is fidelity, not speed per se — the fidelity model multiplies single-qubit, carrier-background, two-qubit, handover, crosstalk, transport-heating, and idle-decoherence factors — but since gate counts are fixed by the input circuit and all remaining loss terms shrink as the schedule shortens, total execution time serves as the practical target.

Evaluation compares against ZAP (referred to as Planar-ZAP), a state-of-the-art open-source compiler for the zoned planar architecture, using identical hardware parameters so the results isolate the architectural difference. The hardware model draws on published experiments: 1Q fidelity 0.9975 (0.625 μs), global carrier 0.9997, 2Q fidelity 0.995 (0.36 μs), handover fidelity 0.999 at 15 μs each, readout fidelity 0.998 at 500 μs, and T₂* = 12.6 s as demonstrated on a 6,100-qubit tweezer array. Geometry uses Δz_min = 20 μm, layer spacing 21 μm, AOL axial range Z_max = 136 μm, and atom-loss threshold v_loss = 1.0 μm/μs. Placement hyperparameters are fixed across all benchmarks: δ = 0.1, d* = 2.5, λ_rep = 50, 200 force-directed iterations with initial step 2.0 scaled by 0.95 per iteration, and λ_z = 10.

Why This Matters

Impact on research. The paper reframes 3D atom arrays from a hardware curiosity into a compilation target, and argues explicitly that a 2D compiler cannot simply be extended: a planar router has no notion of focal planes, models a single control plane rather than potentially colliding frames, and never reasons about axial clearance. It also contributes a physically grounded movement model — anisotropic, sequential axial-then-in-plane channels with a minimum-jerk profile capped at peak rather than mean speed — that is more conservative than the uniform-acceleration, isotropic-Euclidean cost assumed by prior compilers.

Real-world applications (as implied by the benchmark families, not claimed as deployed systems):

• Quantum chemistry and materials simulation, where dense long-range circuits dominate.
• Combinatorial optimization via QAOA, including Max-C (the benchmark family list is truncated in the supplied content, so the full set is not reported here).
• Cryptographic and arithmetic subroutines, since QFT of the type benchmarked underlies phase estimation and factoring.
• Any near-term application gated by circuit depth and qubit count on neutral-atom hardware, where the paper's scaling argument — that gains widen with array size — matters most.

Industry relevance. The results are expressed in the quantities hardware teams actually track: transport distance, movement fidelity, serialization conflicts, and transport-round count. The 1.8× reduction in AOD transport rounds in particular maps directly onto laser-control and timing budget, and the readout-isolation result means mid-circuit measurement can overlap with computation instead of extending it. The finding that lift-and-hop requires no additional hardware — just a reserved band of focal heights free of static traps — makes the approach plausible as a firmware/software upgrade path for groups already demonstrating 3D tweezer control.

Future Directions

• Relaxing the safe-position assumption. The fidelity model sets the crosstalk factor to unity because all interactions are confined to reserved safe positions. The authors retain the term specifically so that relaxed layouts violating those positions would be penalized, but such layouts are not evaluated — leaving open how much additional density is available if crosstalk is modeled per-source (stray addressing light, residual Rydberg tails, spectator atoms inside a beam waist) rather than avoided.
• Extending the analytical placement. The current legalizer treats axial clearance as a soft constraint, falling back to a violating site when no compliant one exists. Whether tighter or non-uniform layer spacings — constrained by (K−1)s ≤ Z_max over an AOL range of 136 μm — can support larger registers without violating clearance is untested.
• Scaling the architectural comparison. The paper reports gains widening at scale up to 100-qubit QFT; how the advantage behaves at the 6,100-qubit scale associated with the cited coherence measurement, and where three-dimensional transport's per-gate vertical round trip eventually outweighs the lateral savings, is not established.
• Co-design with hardware. The taxonomy of layer selectivity is presented as representative of current Rb/Cs tweezer platforms; whether the entanglement-layer and transit-layer assumptions hold for other species, wavelengths, or Rydberg schemes (the paper cites 420+1013 nm counter-propagating excitation) is an open hardware question.

Target Audience

Quantum-computing systems researchers and compiler engineers working on neutral-atom platforms will get the most from this paper, particularly those already familiar with zoned planar architectures and AOD-based transport. It is also valuable to experimentalists building 3D tweezer arrays who want to know which optical constraints dominate at the software layer, and to architecture researchers comparing topological approaches to scaling atom arrays. Readers without background in Rydberg blockade, AOD tone ordering, or placement-and-routing will find the formalism dense, though the architectural argument itself is geometrically intuitive.

Authors’ abstract

Neutral-atom quantum computers can now arrange atoms in three-dimensional tweezer arrays, yet every existing compiler assumes a flat geometry. We present Piqasso, a compiler that exploits the vertical axis by stacking storage, entanglement, and readout into distinct layers. Its pipeline pairs an analytical placement respecting axial-clearance optics with a router that brings gate partners together via short vertical hops---bypassing in-plane crossing conflicts through out-of-plane detours---and a multi-AOD scheduler that parallelizes transport across focal planes. On 34 circuits, Piqasso reduces atom transport distance by 2.1$\times$ over a state-of-the-art planar compiler, yielding up to 7.3$\times$ faster execution, 2.2$\times$ higher movement fidelity, and 1.8$\times$ fewer serialized transport rounds, with all gains widening at scale.