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Verification / Senior Verification Engineer

Cambridge, UK | Full-time | Permanent | Hybrid Salary: £60,000 to £88,000 (DOE) + Bonus + Benefits The salary range for this role is broad, as we are able to consider varying levels of experience. Any offer made will carefully take into acc

Company

Riverlane

Location

Cambridge, UK

Status

Open

Posted

2026-02-04T11:28:24+00:00

Riverlane is hiring a Verification or Senior Verification Engineer to work on functional verification for its quantum error-correction hardware and embedded software. The role covers verification planning, SystemVerilog testbenches with checkers, reference models and coverage, regression tracking and debugging across RTL, simulation and hardware. The posting asks for commercial functional verification experience, UVM/OVM, SystemVerilog assertions and some C, C++ or Python. It offers a hybrid Cambridge post, part-time consideration and states that no quantum-computing background is required.